LA12xx

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The Layerscape Access LA12xx family of programmable baseband processors delivers high-performance digital signal processing capabilities, performance scalability and application flexibility for 5G sub-6 GHz and mmWave Fixed Wireless Access equipment such as Integrated Small Cells, O-RAN Distributed Unit and Radio Unit and Customer Premises Equipment (CPE). It can be also used in proprietary wireless applications such as defense and civilian radio systems and non-terrestrial networks (NTN).

The family is equipped with a unique combination of:

High performance Vector Signal Processing Accelerators (VSPA)
Forward Error Correction Accelerator (FECA)
Integrated data converting subsystem (ADC/DAC)

For additional information and sample availability, contact NXP Support.

Application Notes

Product Details

Block Diagram

Layerscape Access LA12xx Block Diagram

Get diagram PDF

Features

Core and Memory Complex

6x 32-bit e200 Power® Architecture core complex @ 614.4 MHz
Up to 8x VSPA3-16 @ 614.4 MHz (=1.3 TFLOP)
2MB On-Chip SRAM memory

Connectivity and I/O

2x PCIe Gen3 up to 8 lanes total
2x {I+Q} HS-DCS complex sampling rate of 1966.08 or 983.04 Msps

Dual channel, <1GHz RF channel bandwidth at mmWave bands

4x {I+Q} LS-DCS complex sampling up to 491.52 Msps

Four channel, <140 MHz RF channel bandwidth at sub-6 GHz bands

Acceleration

Forward Error Correction Unit (FECU)

3GPP 5G/NR 38.212 compliant gNB and UE modes
Polar decoder/encoder
LDPC decoder/encoder

Device

FC-PBGA package

Part numbers include: LA1200S7H08AB, LA1200S7S08AB, LA1200X7H08AB, LA1200X7S08AB, LA1201S7H88AB, LA1201S7S88AB, LA1201X7H88AB, LA1201X7S88AB, LA1212S7S84AB, LA1212S7S88AB, LA1212X7S84AB, LA1212X7S88AB, LA1214S7S84AB, LA1214S7S88AB, LA1214X7S84AB, LA1214X7S88AB, LA1215S7S84AB, LA1215S7S88AB, LA1215X7S84AB, LA1215X7S88AB, LA1216S7S88AB, LA1216X7S88AB, LA1218S7S88AB, LA1218X7S88AB, LA1220SA7S88ZA, LA1223S7S84AB, LA1223X7S84AB, LA1224S7S88AB, LA1224S7SA88AB, LA1224X7S88AB, LA1224X7SA88AB, LA1232S7S84AB, LA1232S7S88AB, LA1232X7S84AB, LA1232X7S88AB, LA1234S7S84AB, LA1234S7S88AB, LA1234X7S84AB, LA1234X7S88AB, LA1235S7S84AB, LA1235S7S88AB, LA1235X7S84AB, LA1235X7S88AB, LA1236S7S88AB, LA1236X7S88AB, LA1238S7S88AB, LA1238X7S88AB.

Comparison Table

LA12xx Family Comparison Table

Application	Device Family	Part Number	FECA	DSP-Cores	Low-Speed DCS	High-Speed DCS
O-DU	LA120x	LA1200		N/A	N/A
O-DU	LA120x	LA1201		8x	N/A
O-RU	LA121x	LA1212	N/A	8x	2T2R	N/A
		LA1214		8x	4T4R	N/A
		LA1215		8x	N/A	mmWave
		LA1216		8x	2T2R	1*Rx Only
		LA1218		8x	4T4R	2*Rx Only
FWA-CPE	LA122x	LA1223		8x	2T2R	N/A
		LA1224		8x	Dual Use	Dual Use
		LA1325		8x	N/A	mmWave
ISC	LA123x	LA1232		8x	2T2R	N/A
		LA1234		8x	4T4R	N/A
		LA1235		8x	N/A	mmWave
		LA1236		8x	2T2R	1*Rx Only
		LA1238		8x	4T4R	2*Rx Only

Software Support

NXP provides CodeWarrior, the Integrated Development Environment associated with Layerscape Access and many other NXP devices. Included in this environment is a multi-generational, mature compiler as well as access to a rich suite of existing software / signal processing libraries, examples and training material.

A broad ecosystem and comprehensive development platform support is essential to ease development and speed time to market for a commercial grade 3GPP Stacks. All L1 and L2/+ software stack is available from NXP and/or partners depending on the device category and other requirements.

Hardware Tools

Customers can implement and develop their applications with LA12xx evaluation hardware. The LA12xx Evaluation Board is a combination of NXP LX2160 multicore Arm® processor as host and LA12xx modem as baseband for 5G-NR Fixed Wireless applications. The boards come with pre-loaded board support package (BSP) based on a standard Linux kernel.