Coinciding with the expansion of IoT, another mass migration is underway. Intelligence is shifting from the cloud to edge devices capable of machine learning (ML) and able to process streams of sensor data locally with lower latency, greater security and more user privacy than cloud-based AI systems. To convert edge data into actionable edge intelligence, developers require a new class of low-power microcontrollers (MCUs) with multicore performance and built-in accelerators for ML tasks while minimizing power budgets to maintain energy-efficient system designs.
Looking to the future of MCUs for edge intelligence, NXP recently launched the MCX portfolio, an MCU platform that delivers scalable performance, parallelism, security, power efficiency and a rich peripheral set optimized for an array of IoT, edge ML and industrial use cases. The MCX portfolio combines the DNA of NXP’s LPC and Kinetis MCU families to redefine the next generation of general-purpose MCUs for smart, connected devices.
The first MCX offering out of the gate is the MCX N Advanced series, designed for secure, intelligent edge applications. The N series includes the newly announced MCX N94x and MCX N54x MCU families featuring a highly efficient multicore architecture, an integrated EdgeLock® secure subsystem and a dedicated, on-chip neural processing unit (NPU) for real-time inference. The MCX N94x family is geared toward industrial applications with a wider set of analog and motor control peripherals, while the MCX N54x family targets consumer and IoT applications with peripherals ranging from high-speed USB with a PHY to secure digital (SD) and smart card interfaces.
Delivering multitasking performance and advanced neural networking and ML capabilities with a low-power 150 MHz MCU may seem extraordinarily difficult, but the MCX N94x and MCX N54x devices are not ordinary MCUs. They are marvels of multicore design and peripheral integration.
The MCX N94x and MCX N54x are based on dual high-performance Arm® Cortex®-M33 cores running up to 150 MHz, along with 2MB of flash with optional full ECC RAM, smart DMA, a DSP co-processor, a secure subsystem and an integrated NXP-designed NPU. Developers can use any combination of these cores and accelerators for specific tasks without driving up the MCU clock speed or increasing power consumption.
The on-chip accelerators enable the MCX N MCUs to juggle multiple complex tasks very efficiently within a low power budget while keeping the system secure. The multicore design delivers improved system performance and reduced power consumption by enabling smart, efficient distribution of workloads to the analog and digital peripherals. As a result, the MCUs consume less than 45 μA/MHz active current, less than 2.5 μA in power down mode with the real-time clock (RTC) enabled and 8 KB SRAM retention, and less than 1 μA in deep power-down mode with the RTC active and 8 KB SRAM.
The dual-core architecture pairs a full-featured Cortex-M33 core with a streamlined M33 core to manage control functions, enabling developers to run applications in parallel or reduce overall power consumption by turning off individual cores as needed. For example, during secure over-the-air (OTA) updates for IoT devices, the main M33 core can handle system security, while the second streamlined core executes control functionality.
The MCX N MCUs include NXP’s first instantiation of its specialized NPU designed to enable high-performance, low-power intelligence at the edge. The on-chip NPU delivers up to 30x faster ML throughput compared to using a CPU core alone.
This top of MCU class ML performance expands TinyML capabilities for resource- and power-constrained edge devices. Imagine the possibilities: you can implement sophisticated deep-learning models, add face and voice recognition for access control, create battery-powered glass-break detectors for home security systems, develop vibration sensors for motor control predictive maintenance and design smart wearable devices equipped with bio sensors.
The MCX N Series peripheral flexibility is like a developer’s treasure box. The high-resolution mixed-signal analog peripherals are designed to operate with greater autonomy to minimize CPU interrupts and save power. For example, the ADCs have built-in intelligence to continually collect data and average the stored data locally. Each of the MCUs’ two 16-bit ADCs can be used as two single-end input ADCs (effectively functioning as four ADCs) or as a single differential input ADC.
Industrial-strength communications peripherals include Ethernet, CAN-FD, BLDC/PMSM motor control support, high-speed and full-speed USB, and integrated sensor interfaces (MIPI-I3C, I2C, UART and SPI). For added flexibility, NXP’s LP Flexcomm interface allows any combination of ten serial peripherals including SPI, UART and I2C.
Built following NXP’s secure-by-design approach, the MCX N series MCUs feature an EdgeLock® secure subsystem having a secure boot with an immutable root-of-trust, hardware-accelerated cryptography, active and passive intrusion detection plus voltage and temperature tamper detection. This best-in-class security architecture provides support for in-field updates, online transactions and protection against over-production at remote original design manufacturers (ODMs).
To help ease and accelerate system development, the MCX N MCUs are supported by NXP’s popular MCUXpresso suite of software including tools for simple device configuration and secure programming. Developers can choose to use the fully featured MCUXpresso IDE or IDEs from IAR and Keil. NXP provides drivers and middleware with extensive examples and support for a range of RTOS choices, complemented by a wide array of compatible middleware from NXP’s partner ecosystem, enabling rapid development of a broad range of applications. NXP’s eIQ® ML software development environment also provides easy-to-use tools to train and support ML models running on the integrated NPU.
MCX N opens new possibilities for advanced edge ML designs with limited power budgets. Learn more about the NXP MCX N94x and MCX N54 MCUs.
CK joined Philips Semiconductors in 1993 and worked in various roles including quality, applications engineering, product engineering and technical marketing. After Philips, CK joined Freescale in 2012 and rejoined NXP through the Freescale merger. CK is now a Product Manager for Microcontrollers in the Edge Processing Business Line.
